lid base sealing terminal terminal plating rohs 22SMOP package item generic part number frequency range frequency stability over all conditions operating conditions operating temperature input voltage (v dd ) stand-by control voltage (pin#1) absolute max. ratings supply voltage storage temperature input current stand - by current t 2 output ( - 20?c to 75?c) symmetry rise and fall times (10%v dd to 90%v dd level) "0" level "1" level load disable delay time enable delay time startup time aging jitter reflow condition metal ceramic ausn tungsten (metalized) gold / nickel (surface) / (under) compliant (pb-free) 22SMOP t 1 0.5 mhz to 200.0000 mhz 22SMOP(a) : ? 100 ppm over - 20?c to 75?c 22SMOP(b) : ? 50 ppm over - 20?c to 75?c 22SMOP(aw) : ? 100 ppm over - 40?c to 85?c - 20?c to 75?c (standard) - 40?c to 85?c (w) 2.8v ? 5%, 3.0v ? 5% or 3.3v ? 5% v ih : 80%v dd min. v il : 20%v dd max. t 2 - 0.3v to 7.0v dc - 55?c to 125?c 30 ma max. (pin #1 = open or v ih ) 100 a max. (pin #1=v il ) 45% to 55% at 50%v dd level (0.5mhz to 80.00mhz) 40% to 60% at 50%v dd level (80.00mhz to 200.00mhz) 7 ns max. (0.5mhz to 100.000mhz) 4 ns max. (100.000mhz to 200.000mhz) v ol : 10%v dd max. v oh : 90%v dd min. 15 pf max. (cmos) 150 ns max. 10 ms max. 10 ms max. ? 5 ppm max. at 25?c ? 3?c for first year 200 ps : cycle to cycle 250 ps : peak to peak 250?c ? 10?c for 10 seconds 170?c ? 10?c for 1 to 2 minutes (preheating) 76 tf t t 90% or 80% v dd 10% or 20% v dd ov dc symmetry=t/t 100(%) 50% v dd tr gnd v oh ("1"level) v ol ("0"level) v dd 2.5 0.1 2.0 0.1 1.0 0.1 0.7 0.8 0.9 a c db 0.8 0.7 0.6 #1 #2 #4 #3 #4 #3 ? the terminals (a, b, c & d) not to be connected. #1 #2 pin 1 connection "l" 2 gnd 3z open or "h" output z : high impedance 4v dd 22SMOP output waveform v dc power supply cl : including fixture and probe capacitance. v dd v dd cl t est point #2 #3 output tri-state gnd #1 #4 0.01 f ? 0.1 f e/d sw a test circuit 1.1 0.7 1.8 0.9 0.9 0.5 1.1 0.01 f ? 0.1 f soldering pattern 22SMOP 22SMOP (+2.8v, +3.0v or +3.3v programmable models) crystal clock oscillators standard smd clock oscillators specifications standard specifications standard specifications package data using pll technology ( t 1) final exact part number to be determined with frequency, frequency stability, operating temperature and input voltage. e.g. 22SMOP(3.3va) 125.000 mhz. ( t 2) internal crystal oscillation to be halted (pin #1=v il ). clk osc item a 2.8 2.3 8.0 3.5 4.0 1.0 0.25 1.1 180 qty/reel b c d f j l m reel dia. 2000pcs 1000pcs 4.0 0.1 2.0 0.1 1.75 0.1 + 0.1 - 0 1.5 l b f d a c j m t ape specifications actual size
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